Design and Evaluation of an FPGA-ADC Prototype for the PET Detector Based on LYSO Crystals and SiPM Arrays

The aim of this study is to design and evaluate a simple free running Analog-Digital Converter (ADC) based on the Field Programmable Gate Array (FPGA) device accomplish energy position readout silicon photomultiplier (SiPM) array for application as PET scanners. This FPGA-ADC carry chain Time-Digital (TDC) implemented Kintex-7 FPGA consists only one off-chip resistor so it has greater advantages in improving system integration reducing cost than commercial chips. In paper, front-end electronics prototype presented, both principle implementation considerations are discussed. Experiments were performed using an 8 x (crystal size: 4 15 mm3 ) 12 2.65 x2.65 segmented LYSO crystals coupled with SiPM (Jseries, from ON Semiconductor) which under 22Na point source excitation. Initial test results indicate that resolution two detectors after correction around 13.2% 13.5 % at 511 keV, profiles flood histograms show clear visualization discrete scintillator element. All measurements carried out room temperature (~25 degree), without additional cooling